Dera NVMe


PCIe 3.0 x8
■ 遵循 NVMe 1.3 标准
■ 企业级数据可靠性保障
■ 1.6TB-8.0TB 容量
■ 3.2/2.9 GB/s 顺序读/写带宽, 800K/375K
随机读/写 IOPS(PCIe3.0x4)
■ 4.6/3.1 GB/s 顺序读/写带宽, 1050K/230K
随机读/写 IOPS(PCIe3.0x8)
■ 主流操作系统原生驱动支持
■ 支持 UEFI 启动
■ 支持热插拔

High Lights

PCIe 3.0 x8
■ NVMe 1.3 compliant
■ Data integrity of enterprise class
■ 1.6TB-8.0TB capacity options
■ 3.2/2.9 GB/s sequential R/W Bandwidth,
800K/375K 4KB random read/write IOPS
(PCIe 3.0 x4)
■ 4.6/3.1 GB/s sequential R/W Bandwidth,
1050K/230K 4KB random read/write IOPS
(PCIe 3.0 x8)
■ Native driver support of mainstream
operating systems and hypervisors
■ UEFI bootable
■ Surprise hot-pluggable

DERA NVMe SSD的核心控制芯片是紫光得瑞基于软硬件协同理念自主设计开发的 ASIC,
立足于企业级数据可靠性保障、闪存管理和性能聚合等核心技术,集成了大量专用计算硬件加速单元。结合 FTL
The ASIC controller of DERA NVMe SSD is developed by DERA with
software-hardware co-designmethodology. Built-in with many purpose-specific hardwareunits, the
controller enables enterprise-class data integrity,sophisticated NAND flash management, and
performanceaggregation in a power-efficient way. Orchestrated by the FTLdesigned at the same pace
with the controller,D5000/D5007 series deliver reliable and highperformance NVMe storage
DERA NVMe SSD 的控制器芯片集成了高强度 ECC 硬件编解码单元,检测并纠正 NAND
介质访问的数据错误。在此基础上,对完整数据通道的端到端保护、NAND 自适应冗余保护机制、意外掉电检测及
Data Integrity
The intense hardware ECC units built in D5000/D5007 series throttle errors occurred during accesses
to NAND device.D5000/D5007 series also implement end-to-endprotection on the whole data
paths against silent errors,adaptive redundancy protection among independent NANDunits, and
protection against unexpected power-losses, whichare forged into an integrated protection for user
data. Inaddition, D5000/D5007 series constantly sense thetemperatures on board once
powered on and react in realtime accordingly to keep the devices from overheatingdisasters,
decreasing the daily operation complexities.
DERA NVMe SSD 的管理算法充分预计了高压力下的极端情况和工作负载的多变性,对前
端 I/O请求和后台行为进行了精细调度和控制,确保在任何情况下性能表现平稳。DERA NVMe SSD
的随机读写性能可以在相当高的负载压力下,保持 90%以上的一致性。
[1] 测量范围为100% LBA,表中OIO64对应TC=1,QD=64
[2] 测量范围为100% LBA,使用OIO256(TC=4,QD=64)进行测试,TC表示线程数/Worker数量,QD表示队列深度,OIO为总队列深度
[3] 测量范围为100% LBA,使用OIO1(TC=1,QD=1)进行测试
[4] 测量范围为100% LBA。顺序读/写采用128KB,OIO64(TC=1,QD=64)进行采样。随机读写采用4KB,OIO256(TC=4,QD=64)进行采样。采样间隔100ms
版权所有 © 北京紫光得瑞科技有限公司 2019。 保留一切权利。
Stable Performance
The FTL algorithm of D5000/D5007 series sufficientlyanticipate the extreme conditions of
highly-intense workloadsand workload variations with sophisticated scheduling andcontrols over
front-end I/O demands and FTL backendactivities, ensuring a stable performance in all cases.
D5000/D5007 series deliver a performanceconsistency above 90% in significantly heavy
random I/Oworkloads.
[1] 100%LBA, OIO 64(TC=1, QD=64)
[2] 100%LBA,measured with OIO256 (TC=4, QD=64).
[3] 100%LBA, OIO1 (TC=1, QD=1)
[4] 100%LBA. Sequential R/W power consumption is measured with 128KB, OIO64(TC=1,QD=64) which is lower than Random operation. Random R/W measured with 4KB, OIO256(TC=4, QD=64). Scope trigger over 100ms sample period.
Copyright ©DERA Co., Ltd 2019. All rights reserved.
Product specifications provided are sample specifications and do not constitute a warranty. Specifications and designs aresubject to change without notice